Interaction between PWMA and Timer A

[Pacetech]

I'm getting a wierd hardware interaction that I can't understand/identify.

I'm using Timer A for reading an optical encoder, as follows
\ Encoder A - TA0/PHASEA0
\ Encoder B - TA1/PHASEB0
\ Encoder Index - TA2/INDEX

I just initialize as follows:

COLD
SCRUB
HEX
0040 0E40 SET-BITS ( Set bit 6 = XIP )

Then I can read the encoder

0E48 @ .

Now when I setup my SPI EEPROM, I am using PWMA5 as a chip select, as well as a PWMA0 and PWMA1

: SPI-INIT ( - )
PWMA1 ON \ PWMA1/ISA1 - /HOLD - Normally high, pull low to suspend
PWMA0 ON \ PWMA0/ISA0 - /WP - Normally high to enable writing
PWMA5 ON \ Set Slave Select high
50 0F20 ! \ Configue SPI without enabling - SPI MODE 0
07 0F21 ! \ Configure Word Size
52 0F20 ! \ Set just the SPIE - enable bit
; EEWORD


Well, as soon as I execute this code, I can no longer read valid info from the encoder, it just gives me the same number.

So, I narrowed it down to PWMA0 ON as being the culprit and tried to manually set the PWMA pins without using the ISOMAX ON command. To make it short, I read up on PWM and found this post

http://www.newmicros.com/discussion/showthread.php?t=546

It turns out the problem is caused by setting PAD_EN [bit 15] on the PMOUT register [0E03]. This is the output pad enable bit.

So once I set the PWM pins to be outputs, my Timer A no longer reads the right value. Turn it off and it works again.

I cannot find anything in the documentation that explains this - any ideas?

[Pacetech]

I also found this on dsprelated.com

PWMA/SCI0 Conflict?
eriley08 - Aug 30 17:58:00 2005


Hello,

I ran into an odd conflict with SCI0 and PWMA on the 56F805 and was
wondering if anyone knew anything about why it happens or what mistake
I'm making?

I'm using C (no assembler) in CodeWarrior, internal memory, 56F805 on
a NewMicros IsoPod board.

I set up SCI0 to be RS-232 9600 8N1 (there's a Maxim driver chip on
the IsoPod). It sends data successfully (only need to send for this
application, so don't know anything about receiving) after its
initialization.

I then initialize PWMA for independent edge-aligned operation. SCI0
still works fine. However, the moment I enable output pads
(un-tristate the PWM outputs; bit 15 of PMOUT), SCI0 suddenly dies and
is unable to send anything.

Using SCI1 instead of SCI0 fixed the problem, but I'm still perplexed
as to why this happens, and have had no luck finding reference to it
in the errata, the peripheral manual or the family manual.

Does anyone have any insight into or experience with this issue?

Thanks,
- Elizabeth

[nmitech]

I tried your code on both V0.76 & V0.82. It seem to work fine to me. I didn't have anything connect to the PWM channels but only encoder to test with.
See the result copied & pated below.


IsoMax V0.76
COLD
IsoMax V0.76
SCRUB
IsoMax V0.76
HEX OK
0040 0E40 SET-BITS ( Set bit 6 = XIP ) OK
OK
( Then I can read the encoder OK
OK
: ENCA BEGIN
0E48 @ .
?TERMINAL UNTIL ; EEWORD OK
OK
OK
OK
: SPI-INIT ( - )
PWMA1 ON \ PWMA1/ISA1 - /HOLD - Normally high, pull low to suspend
PWMA0 ON \ PWMA0/ISA0 - /WP - Normally high to enable writing
PWMA5 ON \ Set Slave Select high
50 0F20 ! \ Configue SPI without enabling - SPI MODE 0
07 0F21 ! \ Configure Word Size
52 0F20 ! \ Set just the SPIE - enable bit
; EEWORD OK
OK
ENCA 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C 16 18 20 2A 31 36 3C 42 48 4F 5A 66 72 7E 8C 91 9C A6 B0 B8 C1 CB DA E3 E6 E8 E8 E8 E8 E8 E8 E8 E8 E8 EA F0 F8 100 108 112 11A 122 126 12A 12E 133 136 13A 13F 146 14A 14C 150 152 155 156 158 15A 15E 162 166 16A 16C 16E 172 176 17B 183 187 188 188 188 188 188 188 188 188 188 188 OK
OK
SPI-INIT OK
ENCA 188 188 188 188 186 186 186 186 186 186 186 186 186 186 186 186 186 186 186 186 186 186 186 188 18D 190 192 192 192 192 193 193 193 193 192 192 196 198 19C 1A3 1AC 1B1 1B4 1B8 1BA 1BA 1BA 1BA 1BA 1BC 1BC 1BC 1C0 1C6 1C8 1C8 1CA 1CC 1D4 1DA 1DD 1E1 1E3 1E4 1E4 1E6 1E9 1EE 1F2 1F4 1F6 1FC 200 206 20D 211 21A 21A 21A 21A 21A 21C 223 228 22E 230 232 232 232 232 232 232 23A 247 256 264 26C 26D 26D 26D OK
OK