Pwm-in

[Cameron]

I'm having problems using the PWM-IN command in code. It seems to work fine when typed but not when in a MACHINE or new word. Can someone tell me why one of these two sets of code should hang up at the PWM-IN line.

VARIABLE VEL
FVARIABLE FVEL
FVARIABLE CNST
7.5E7 CNST F!
: READVEL
TC0 ACTIVE-LOW
TC0 PWM-IN VEL !
VEL @ S>F FVEL F!
CNST F@ VEL F@ F/ F. ;

or this one


VARIABLE VEL
FVARIABLE FVEL
FVARIABLE CNST
7.5E7 CNST F!
TC0 ACTIVE-LOW

MACHINE SPEED
ON-MACHINE SPEED
APPEND-STATE READVEL
IN-STATE READVEL
CONDITION
CAUSES
TC0 PWM-IN VEL !
VEL @ S>F FVEL F!
CNST F@ VEL F@ F/ F.

THEN-STATE READVEL TO-HAPPEN
READVEL SET-STATE
EVERY 5000 CYCLES SCHEDULE-RUNS SPEED

[RMDumse]

Apparently PWM-IN is not very IsoMax(TM) compliant, and contains a Program Counter Capture Loop. That's a no no and we will look into it further.

Here is an example of using a timer to measure a pulse time from a Devantech CMPS03 Robot Compass Module. The settings used to set up the timer are detailed bit by bit.

( CMPS03 Robot Compass Module
( 1 +5
( 2 SCL I2C
( 3 SDA I2C
( 4 PWM out
( 5
( 6 Calibrate
( 7 50/60HZ
( 8
( 9 GND

( The PWM signal is a pulse width modulated signal with a positive width of
( pulse representing the angel 1ms equals 0 deg, 36.99ms equals 359.9 deg

( TMRA 0D00
( TMRB 0D20
( TMRC 0D40
( TMRD 0D60

( Count rising edges of primary source while secondary input high active
( 011 ( COUNT MODE
( 1101 ( PRIMARY COUNT SOURCE IP/32
( 00 ( SECONDARY COUNT Counter # 0 input
( 0 ( COUNT ONCE - 0 FOR REPEATEDLY
( 0 ( COUNT LENGTH - 0 FOR ROLL OVER
( 0 ( DIR COUNT - 0 FOR UP
( 0 ( COINIT NO FORCE BY OTHER CHANNELS
( 000 ( OUPUT MODE, Active while counter is active

( 011 1101 00 0 0 0 0 000
( 0111 1010 0000 0000
( 7A00

( STATUS 00 TCF, TCFIE
( 00 TOF, TOFIE
( 00 IEF, IEFIE
( 0 IPS
( 0 INPUT
( 10 CAPTURE REGISTER OPERATION CAP ON FALLING EDGE
( 0 MASTER
( 0 EEOF
( 0 VAL
( 0 FORCE
( 0 OPS
( 0 OEN
( 0080
( BASE + F


( CMP1 VALUE
( BASE + 0

( CMP2 VALUE
( BASE + 1



( SCRUB


COLD

HEX

: PLS
D07 @ 0100 AND 0=
IF
7A00 D06 ! ( CTRL REG. TMRC0 CNT RISING IP/32 2ND PIN#0
0080 D07 ! ( SCR REG. TMRC0 CAP MODE RISING EDGE
0 D05 ! ( ZERO TMRA0 CNTR REG.
0 D40 ! ( ZERO TMRA0 CMP1 REG.
THEN
;

EVERY C350 CYCLES SCHEDULE-RUNS PLS

: BEARING D02 @ DUP U. 470 - 0 7C UM/MOD SWAP DROP . ." deg. " ;

: Z DECIMAL BEGIN D EMIT BEARING ?TERMINAL UNTIL ;


The data is always ready in the timer register. The final word Z is just a test word, with a PCC Loop in it as well, not intended to be used in a final application, and only in the foreground while testing.

[nmitech]

PWM-IN currently defined as immediate word, so you may change from this,

: READVEL
TC0 ACTIVE-LOW
TC0 PWM-IN VEL !
VEL @ S>F FVEL F!
CNST F@ VEL F@ F/ F. ;

To this,

: TC0-IN TC0 [COMPILE] PWM-IN ; IMMEDIATE

: READVEL
TC0 ACTIVE-LOW
TC0-IN VEL !
VEL @ S>F FVEL F!
CNST F@ VEL @ S>F F/ F. ;

Note: TC0-IN (or PWM-IN) will loop and wait for a low pulse signal. So it is better to use the previous example from Randy in the previous post.

[Pacetech]

I found some bad comments here. Also, was wondering why you would use the Compare register?

Originally posted by RMDumse

: PLS
D07 @ 0100 AND 0=
IF
7A00 D06 ! ( CTRL REG. TMRC0 CNT RISING IP/32 2ND PIN#0

-> D06 is TMRA0 CTRL, not TRMC0

0080 D07 ! ( SCR REG. TMRC0 CAP MODE RISING EDGE

-> D07 is TMRA0 SCR, not TRMC0

0 D05 ! ( ZERO TMRA0 CNTR REG.
0 D40 ! ( ZERO TMRA0 CMP1 REG.

-> D40 is TMRC0 CMP1 - should this be TMRA0 CMP 1 0D00??

THEN
;

[RMDumse]

Originally posted by Pacetech
I found some bad comments here.
-> D06 is TMRA0 CTRL, not TRMC0
-> D07 is TMRA0 SCR, not TRMC0
-> D40 is TMRC0 CMP1 - should this be TMRA0 CMP 1 0D00??

Correct. I did some incomplete editing it appears. I originally had this working on Timer C, and edited it for Timer A. So the first two are comment problems, not program problems. The final one is a program problem, but not a necessary step.


Also, was wondering why you would use the Compare register?

Ahhh, perhaps paranoia. Just didn't want a compare happening during the count. So it was being put where the count should not interfere. But it was an unnecessary additional step, best I can tell now.