PlugaPOD Encoders with Index

[mbailey]

Hey guys me again!! :o

I wish to integrate 2 Quad encoders into the Plugapod, now looking through the manuals and Schematics I think I have worked out that the 'A' and 'B' of Encoder1 would go to TA0 and TA1 respectivly, and again the same with Encoder2 TA2 and TA3.

Can my INDEX channels be connected to TD1 for Encoder1 and TD2 for Encoder2? Or could I just use a PE pin?

Throughout the manuals there is much talk of QUAD0 and QUAD1 but it looks like this is not a Plugapod thing, so I have to write a code similar to the ones pasted all over for use with gp timer pins?

Does anyone have samples for the Plugapod? I guess not with index as most peeps do not use it.

I would like to use these encoders for position and velocity.

I look forward to your help!!!


Mike

[mbailey]

Ok I have written some code to get it to work on the timer pins, how easy was that?? :)

I would still like to know about the Index part though, anyone have an idea?

Mike

[Pacetech]

I use 2 quad encoders with index, for the 2nd encoder I set up an interrupt to zero or "home" the encoder.

NOTE: code is tested and is guaranteed to work! (I fixed a few problems with it).

Connections:
Encoder A - TA0
Encoder B - TA1
Encoder I - TA2

Encoder A - TD1
Encoder B - TD2
Encoder I - TA3


COLD
SCRUB

HEX

\ Clear INTERRUPT VECTOR
0007 0E67 CLEAR-BITS
E000 0D46 CLEAR-BITS
4000 0E40 CLEAR-BITS
\ Erase


\ 345678901234567890123456789 80 COLUMN WIDTH 7890123456789012345678901234567890


\ ---------------- Quadrature decoders ------------------
\
\
\ --------------------------------------------------------
\ The 803/PlugAPod has one quad decoder
\ PHASEA
\ PHASEB
\ INDEX
\ HOME
\
\ This is used by E2
\
\ E1 =>H4
\ A - TA0/PHASEA0
\ B - TA1/PHASEB0
\ I - TA2/INDEX
\
\
\ E1 uses Timer D1/D2 along with TA3 Home for the index
\ this requires using an interrupt service routine for index
\
\ TD1/2 -> set up for quadrature counting
\ TA3 -> set up for index - interrupt on index to zero TD counter
\
\ E2 =>H3
\ A - TD1
\ B - TD2
\ I - TA3/HOME
\
\ ---------------------- E1 H6 -------------------------
\ QUADRATURE Decoders using the Timer Module D
\ --------------------------------------------------------
\ TIMER D1 CTRL = 0D6E
\ TIMER D2 CTRL = 0D76

\ CTRL Register = 0x8300 - Forward counting on TMRD1
\ 1000001100000000
\ 100 = Count Mode Quad count mode primary & secondary sources
\ 0001 = Primary souce count from Counter #1 input pin
\ 10 = secondary source from counter #2 input pin
\
\ CTRL Register = 0x8480 - Reverse counting on TMRD1
\ 1000010010000000
\ 100 = Count Mode Quad count mode primary & secondary sources
\ 0010 = Primary souce count from Counter #2 input pin
\ 01 = secondary source from counter #1 input pin
\
\ CTRL Register = 0xEA00 on TMRD2
\ 1110101000000000
\ 111 = Cascaded counter mode, up/down
\ 0101 = Primary souce count from Counter #1 output



\ ---------------- Quadrature decoder using D1/D2 ----------------

: INIT-E1 \ Quadrature decoder using Timer D1/D2
\ QUAD CH 4 MADE OUT OF TMRD1/2 AND Index uses TA3 Home
8300 0D6E ! \ CTRL TMRD1 INA 0, INB 1
FFFE 0D68 ! \ CMP1 FOR OVERFLOW- init this to FFFE and later in HOME-ISR
\ it will get set to FFFF -> use as way of confirming index
0000 0D69 ! \ CMP2 FOR UNDERFLOW
0000 0D6D ! \ COUNTER
0000 0D6F ! \ STATUS

EA00 0D76 ! \ CTRL TMRD1 EXTENDED 32 BITS
0000 0D75 ! \ COUNTER
0000 0D77 ! \ STATUS

\ Enable HOME Interrupt on QUAD CH 0
\ Set Home Interrupt Enable HIE - Bit 14 DECCR0

\ 0E40 => Quadrature Decoder 0
\ DECCR => DECODER CONTROL REGISTER
\ HIRQ => ENABLE HOME INTERRUPTS
\ HIE => HOME INTERRUPT ENABLE

8000 0E40 CLEAR-BITS \ Reset HIRQ Bit
4000 0E40 SET-BITS \ Set HIE Bit

\ GPR7 Bits 2:0 -> Set bits

07 0E67 CLEAR-BITS \ Clear GPR7 bits 2:0
03 0E67 SET-BITS \ PLR Value for IPR channel 2

\ FFFB => INTERRUPT PRIORITY REGISTER
2000 FFFB SET-BITS \ Enable interrupts for IPR channel 2
\ by setting bit 13
; EEWORD

\ Interrupt service routine
\
\ #1 clear the flag that brought you there
\ bit 15 of DECCR0
\ BFSET #$8000,X:$0E40 - Clear bit by writing 1 to it
\
\ #2 Set 0D68 to FFFF to show it has been indexed, it is
\ already set to FFFE, just need to set bit 0 to make it FFFF
\ Used as a way of checking encoder has been initialized.
\
\ #3 Reinitialize the counter TMRD0 0D65
\ BFCLR #$FFFF,X:$0D65
\
\ #4 [optional] disable further interrupts
\ clear Home Interrupt Enable HIE - Bit 14 DECCR0
\ 0E40 @ BFFF AND 0E40 !
\ BFCLR #$4000,X:$0E40
\ 80F4 => 1000 0000 1111 0100
\ 1000 = BITFIELD
\ 000 = BFCLR
\
\ #5 RTI

CODE-INT HOME-ISR
82F4 P, 0E40 P, 8000 P, \ BFSET #$8000,X:$0E40 \ #1
82F4 P, 0D68 P, 0001 P, \ BFSET #$0001,X:$0D68 \ #2
80F4 P, 0D6D P, FFFF P, \ BFCLR #$FFFF,X:$0D6D \ #3
80F4 P, 0E40 P, 4000 P, \ BFCLR #$4000,X:$0E40 \ #5
EDD9 P, \ RTI \ #5
END-CODE EEWORD

\ INSTALL INTERRUPT VECTOR
E984 7DB8 PF!
' HOME-ISR CFA 2+ 7DB9 PF!

\ ------------------- ENC READING - RAW ------------------------

: READ-E1-RAW ( -- enc position )
0D6D @ \ TMRD0 CNTR
; EEWORD

: E1-FORWARD ( -- )
0D6E @ 8300 = NOT \ Check CTRL register
IF
8300 0D6E ! \ 8300 - Forward counting
0D6D @ NEGATE 0D6D ! \ Flip the value of counter
THEN
; EEWORD

: E1-REVERSE ( -- )
0D6E @ 8300 = \ Check CTRL register
IF
8480 0D6E ! \ 8480 - Reverse counting
0D6D @ NEGATE 0D6D ! \ Flip the value of counter
THEN
; EEWORD


\ ---------------- E2- Quadrature decoder #2 ----------------
: INIT-E2 \ Hardware Quadrature decoder #0
0040 0E40 SET-BITS ( Set bit 6 = XIP )
; EEWORD

: DI-E2 ( -- ) \ Disable Index on E2
0040 0E40 CLEAR-BITS ( Clear bit 6 = XIP )
; EEWORD


\ ------------------- ENC READING - RAW ------------------------

: READ-E2-RAW ( -- enc position )
0E48 @
; EEWORD


: E2-FORWARD
0E40 @ 0400 AND \ Check for Bit 10 - REV ON
IF \ Set bit 10 OFF
0E48 @ NEGATE 0E48 ! \ Reverse the value
0E40 @ FAFF AND 0E40 ! \ Careful not to write 1 to bit 8
THEN
; EEWORD

: E2-REVERSE
0E40 @ 0400 AND NOT \ Check for Bit 10 - REV OFF
IF \ Set bit 10 ON
0E48 @ NEGATE 0E48 ! \ Reverse the value
0E40 @ 0400 OR FEFF AND 0E40 ! \ Careful not to write 1 to bit 8
THEN
; EEWORD


\ --------------------- Index Initialized?? -----------------------
\ Checks to see if index has actually been initialized
\ TRUE - Encoder has been indexed
\ FALSE - Encoder Not Yet Indexed
: E1-INDEX? ( -- FLAG )
0D68 @ FFFF = NOT
IF \ Look for FFFE to be replaced by FFFF by ISR
FALSE \ Not checked yet
ELSE
TRUE \ Checked
THEN
; EEWORD


: E2-INDEX? ( -- FLAG )
0E40 @ 0100 AND NOT
IF \ Bit 8/XIRQ of DECCR confirms index pulse
FALSE \ Not checked yet
ELSE
TRUE \ Checked
THEN
; EEWORD

SAVE-RAM

: TEST-IT ( -- )
INIT-E1
INIT-E2
BEGIN
CR
READ-E1-RAW .
READ-E2-RAW .
E1-INDEX? .
E2-INDEX? .
?KEY
10000 0 DO LOOP
UNTIL
;

[mbailey]

Ok thats looks alot different to mine!!! :)

That looks great, do you think I could run 3 Encoders

[mbailey]

Thanks for your time Pacetech,

I am struggling a little on this as I don't understand the way you do your code, I am a Dummy you see....

I have tried to copy and paste the code straight into mine but get many errors, obviously due to not setting things correctly, please would you be so kind to have a look for me??


Thanks In advance


OK
\ Clear INTERRUPT VECTOR OK
0007 0E67 CLEAR-BITS
CLEAR-BITS ? STACK EMPTY
E000 0D46 CLEAR-BITS
0D46 ?
4000 0E40 CLEAR-BITS
CLEAR-BITS ? STACK EMPTY
\ Erase OK
OK
OK
\ 345678901234567890123456789 80 COLUMN WIDTH 7890123456789012345678901234567890 OK
OK
OK
OK
\ ---------------- Quadrature decoders ------------------ OK
\ OK
\ OK
\ -------------------------------------------------------- OK
\ The 803/PlugAPod has one quad decoder OK
\ PHASEA OK
\ PHASEB OK
\ INDEX OK
\ HOME OK
\ OK
\ This is used by E2 OK
\ OK
\ E1 =>H4 OK
\ A - TA0/PHASEA0 OK
\ B - TA1/PHASEB0 OK
\ I - TA2/INDEX OK
\ OK
\ OK
\ E1 uses Timer D1/D2 along with TA3 Home for the index OK
\ this requires using an interrupt service routine for index OK
\ OK
\ TD1/2 -> set up for quadrature counting OK
\ TA3 -> set up for index - interrupt on index to zero TD counter OK
\ OK
\ E2 =>H3 OK
\ A - TD1 OK
\ B - TD2 OK
\ I - TA3/HOME OK
\ OK
\ ---------------------- E1 H6 ------------------------- OK
\ QUADRATURE Decoders using the Timer Module D OK
\ -------------------------------------------------------- OK
\ TIMER D1 CTRL = 0D6E OK
\ TIMER D2 CTRL = 0D76 OK
OK
\ CTRL Register = 0x8300 - Forward counting on TMRD1 OK
\ 1000001100000000 OK
\ 100 = Count Mode Quad count mode primary & secondary sources OK
\ 0001 = Primary souce count from Counter #1 input pin OK
\ 10 = secondary source from counter #2 input pin OK
\ OK
\ CTRL Register = 0x8480 - Reverse counting on TMRD1 OK
\ 1000010010000000 OK
\ 100 = Count Mode Quad count mode primary & secondary sources OK
\ 0010 = Primary souce count from Counter #2 input pin OK
\ 01 = secondary source from counter #1 input pin OK
\ OK
\ CTRL Register = 0xEA00 on TMRD2 OK
\ 1110101000000000 OK
\ 111 = Cascaded counter mode, up/down OK
\ 0101 = Primary souce count from Counter #1 output OK
OK
OK
OK
\ ---------------- Quadrature decoder using D1/D2 ---------------- OK
OK
: INIT-E1 \ Quadrature decoder using Timer D1/D2
\ QUAD CH 4 MADE OUT OF TMRD1/2 AND Index uses TA3 Home
8300 0D6E ! \ CTRL TMRD1 INA 0, INB 1
0D6E ?
FFFE 0D68 ! \ CMP1 FOR OVERFLOW- init this to FFFE and later in HOME-ISR
FFFE ?
\ it will get set to FFFF -> use as way of confirming index OK
0000 0D69 ! \ CMP2 FOR UNDERFLOW
0D69 ?
0000 0D6D ! \ COUNTER
0D6D ?
0000 0D6F ! \ STATUS
0D6F ?
OK
EA00 0D76 ! \ CTRL TMRD1 EXTENDED 32 BITS
EA00 ?
0000 0D75 ! \ COUNTER
0D75 ?
0000 0D77 ! \ STATUS
0D77 ?
OK
\ Enable HOME Interrupt on QUAD CH 0 OK
\ Set Home Interrupt Enable HIE - Bit 14 DECCR0 OK
OK
\ 0E40 => Quadrature Decoder 0 OK
\ DECCR => DECODER CONTROL REGISTER OK
\ HIRQ => ENABLE HOME INTERRUPTS OK
\ HIE => HOME INTERRUPT ENABLE OK
OK
8000 0E40 CLEAR-BITS \ Reset HIRQ Bit
CLEAR-BITS ? STACK EMPTY
4000 0E40 SET-BITS \ Set HIE Bit
SET-BITS ? STACK EMPTY
OK
\ GPR7 Bits 2:0 -> Set bits OK
OK
07 0E67 CLEAR-BITS \ Clear GPR7 bits 2:0
CLEAR-BITS ? STACK EMPTY
03 0E67 SET-BITS \ PLR Value for IPR channel 2
SET-BITS ? STACK EMPTY
OK
\ FFFB => INTERRUPT PRIORITY REGISTER OK
2000 FFFB SET-BITS \ Enable interrupts for IPR channel 2
FFFB ?
\ by setting bit 13 OK
; EEWORD2
; ? MSG# 17
OK
\ Interrupt service routine OK
\ OK
\ #1 clear the flag that brought you there OK
\ bit 15 of DECCR0 OK
\ BFSET #$8000,X:$0E40 - Clear bit by writing 1 to it OK
\ OK
\ #2 Set 0D68 to FFFF to show it has been indexed, it is OK
\ already set to FFFE, just need to set bit 0 to make it FFFF OK
\ Used as a way of checking encoder has been initialized. OK
\ OK
\ #3 Reinitialize the counter TMRD0 0D65 OK
\ BFCLR #$FFFF,X:$0D65 OK
\ OK
\ #4 [optional] disable further interrupts OK
\ clear Home Interrupt Enable HIE - Bit 14 DECCR0 OK
\ 0E40 @ BFFF AND 0E40 ! OK
\ BFCLR #$4000,X:$0E40 OK
\ 80F4 => 1000 0000 1111 0100 OK
\ 1000 = BITFIELD OK
\ 000 = BFCLR OK
\ OK
\ #5 RTI OK
OK
CODE-INT HOME-ISR OK
82F4 P, 0E40 P, 8000 P, \ BFSET #$8000,X:$0E40 \ #1
82F4 ?
82F4 P, 0D68 P, 0001 P, \ BFSET #$0001,X:$0D68 \ #2
82F4 ?
80F4 P, 0D6D P, FFFF P, \ BFCLR #$FFFF,X:$0D6D \ #3
80F4 ?
80F4 P, 0E40 P, 4000 P, \ BFCLR #$4000,X:$0E40 \ #5
80F4 ?
EDD9 P, \ RTI \ #5
EDD9 ?
END-CODE EEWORD OK
OK
\ INSTALL INTERRUPT VECTOR OK
E984 7DB8 PF!
7DB8 ?
' HOME-ISR CFA 2+ 7DB9 PF!
7DB9 ?
OK
\ ------------------- ENC READING - RAW ------------------------ OK
OK
: READ-E1 ( -- enc position )
0D6D @ \ TMRD0 CNTR
0D6D ?
; EEWORD
; ? MSG# 17
OK
: E1-FORWARD ( -- )
0D6E @ 8300 = NOT \ Check CTRL register
0D6E ?
IF
IF ? MSG# 17
8300 0D6E ! \ 8300 - Forward counting
0D6E ?
0D6D @ NEGATE 0D6D ! \ Flip the value of counter
0D6D ?
THEN
THEN ? MSG# 17
; EEWORD
; ? MSG# 17
OK
: E1-REVERSE( -- )
-- ?
0D6E @ 8300 = \ Check CTRL register
0D6E ?
IF
IF ? MSG# 17
8480 0D6E ! \ 8480 - Reverse counting
0D6E ?
0D6D @ NEGATE 0D6D ! \ Flip the value of counter
0D6D ?
THEN
THEN ? MSG# 17
; EEWORD
; ? MSG# 17
OK
OK
\ ---------------- E2- Quadrature decoder #2 ---------------- OK
: INIT-E2 \ Hardware Quadrature decoder #0
0040 0E40 SET-BITS ( Set bit 6 = XIP )
; EEWORD OK
OK
\ ------------------- ENC READING - RAW ------------------------ OK
OK
: READ-E2-RAW ( -- enc position )
0E48 @
; EEWORD OK
OK
OK
: E2-FORWARD
0E40 @ 0400 AND \ Check for Bit 10 - REV ON
IF \ Set bit 10 OFF
0E48 @ NEGATE 0E48 ! \ Reverse the value
0E40 @ FAFF AND 0E40 ! \ Careful not to write 1 to bit 8
FAFF ?
THEN
THEN ? MSG# 17
; EEWORD
; ? MSG# 17
OK
: E2-REVERSE
0E40 @ 0400 AND NOT \ Check for Bit 10 - REV OFF
IF \ Set bit 10 ON
0E48 @ NEGATE 0E48 ! \ Reverse the value
0E40 @ 0400 OR FEFF AND 0E40 ! \ Careful not to write 1 to bit 8
FEFF ?
THEN
THEN ? MSG# 17
; EEWORD
; ? MSG# 17
OK
OK
\ --------------------- Index Initialized?? ----------------------- OK
\ Checks to see if index has actually been initialized OK
\ TRUE - Encoder has been indexed OK
\ FALSE - Encoder Not Yet Indexed OK
: E1-INDEX? ( -- FLAG )
0D68 @ FFFF = NOT
0D68 ?
IF \ Look for FFFE to be replaced by FFFF by ISR
IF ? MSG# 17
FALSE \ Not checked yet OK
ELSE
ELSE ? MSG# 17
TRUE \ Checked OK
THEN
THEN ? MSG# 17
; EEWORD
; ? MSG# 17
OK
OK
: E2-INDEX? ( -- FLAG )
0E40 @ 0100 AND NOT
IF \ Bit 8/XIRQ of DECCR confirms index pulse
FALSE \ Not checked yet
ELSE
TRUE \ Checked
DI-E2 \ Disable index pulse
DI-E2 ?
THEN
THEN ? MSG# 17
; EEWORD
; ? MSG# 17

[nmitech]

Besure to put it in HEX mode at the beginning of this program to fix the download issue.


OK
HEX
\ Clear INTERRUPT VECTOR OK
0007 0E67 CLEAR-BITS
...
...

[mbailey]

WOW I hate it when I am that dumb...

Now for my next trick!

I have set up to print "READ-E1" and "READ-E2-RAW" which prints both values, however the E1 value is fixed to 0 and the E2 value is counting when I turn encoder 1.

Am I reading the correct part? Also when it passes the index should it zero the counter or do I have to call that?

Thanks again

[Pacetech]

I edited my code above, it works now.