WalterR
11-09-00, 07:03 PM
The documentation that came with my new NMIX -0332 board doesn't explain where I can understand what is happening upon a reset.<p>I purchased a BDM cable and attached it to the board. I can watch the CPU32BUG program running with the BDM cable, so I know it's working fine.<p>But when I try to run a small demo program that I upload via the BDM cable, I can't get the code to start. The demo program assumes you only have 48k of RAM starting at address 0x0000. I tried removing the EPROM's and moving the SRAM's to U9 & U11, then uploading my code, but that didn't work either.<p>What are the addresses of the SRAM's?<p>How do I get my code to run on reset (not CPU32BUG or Forth)?<p>What do the chips in U6 and U7 do?<p>Any idea why the debugger warns me that CSBOOT is the only active chip select? Does this mean the memory is not available for use?<p>What's up with the block of 5 jumpers wired to U7? What do they do?<p>Where is R9 on the schematic? Is U6 or U7 responsible for changing memory addresses because of R9? Or how does R9 affect wether CPU32BUG or Forth is started?<p>Thanks for your help!<p>Walter