Addressing on NMIX0332

[thopman]

I've noticed that the silkscreen as printed in the NMIX0332 manual and on the board differs from the schematic in the manual (and implemented in the board). In particular, the address lines appear to be offset: where the silkscreen says A0, it's actually A1, and so on. Are there any more gotcha's like this that I have to watch out for? How do I get access to A0? How are BLE and BHE related to A0? Are they active low? The schematic says no, but the silkscreen and manual say yes. Which do I believe? Would it be possible to get the equation for U6 and U7 so I can figure things out for myself?

[nmitech]

The silkscreen of J13 on NMIX-0332 labels A0 just to match up with the NMI 8-bit peripheral boards. Actually, the addresses are shifting up by one on the 16-bit bus. So instead of A0 it is A1 and A1 is A2 and so on... <p>BLE & BHE are active high signals. NMI intends to use these signals for future expansions on the 16-bit bus peripherals.<br>If you like you can redecode the signals so that you can use with your own application.<p>Here are the equations for the memories and peripherals.<p>@LOGIC EQUATIONS<br>OE=/(/DS*RW);<br>OE.OE=RESET;<br>CSRAMLO=/MEMDIS+/RESET+(SIZ0*/A0)+(CS1*CS2)+(/(CSBOOT*CS0)*RW);<br>CSRAMHI=/MEMDIS+/RESET+(SIZ0*A0)+(/SIZ0*A0)+(CS1*CS2)+(/(CSBOOT*CS0)*RW);<br>CSROMLO=/MEMDIS+/RESET+(SIZ0*/A0)+(CSBOOT*CS0);<br>CSROMHI=/MEMDIS+/RESET+(SIZ0*A0)+(/SIZ0*A0)+(CSBOOT*CS0);<br>BLE=SIZ0*/A0;<br>BLE.OE=RESET;<br>BHE=(SIZ0*A0)+(/SIZ0*A0);<br>BHE.OE=RESET;<br>VBON=/RESET;